5 Levels of Autonomy (L1 and L2)

In order to keep everyone more or less on the same page, the Society of Automotive Engineers (SAE) has developed a convenient 5 level nomenclature to define the different levels of autonomy within the self-driving car industry. The chart above shows the 5 levels and also level zero which is no autonomy at all.

This week we will just discuss level 1 and 2 because they together form what is known as ADAS or Advanced Driver Assistance System. Almost all modern cars on the road today employ some amount of L1 or L2 level autonomy. It is often marketed under names such as “Cadillac Super Cruise” or “Subaru EyeSight”. The distinction between L1 and L2 is not so important but one can think of L1 as driver assist functions that have been available for decades such as basic cruise control, anti-lock brakes and stability control. L2 on the other hand are more recent features (introduced in the last decade or so) such as adaptive cruise control (speed up or slow down vehicle based on traffic flow), lane departure warning, blind-spot detection, parking assistance and autonomous emergency braking.

L2 is sometimes referred to as the “feet-off” stage of autonomy since with adaptive cruise control you don’t need to accelerate or brake for stretches of time. However, L1 and L2 technologies are almost passe now since every major manufacturer has the technology and it is on its way to becoming ubiquitous. All the marketing hype is around the next stages of autonomy which we will discuss next week.

Host CPU Offload Product Features Summary
wdt_ID Speed 1G 10G 10G 10G 10G/40G 10G/40G 100G 100G 100G 100G
1 Model ANIC-4Ku ANIC-20Ku ANIC-40Ku ANIC-40Kq ANIC-80Ku ATLAS-1000
ANIC-100Kq ANIC-200Ku ANIC-200K
2 Port/Type 4 X 1G SFP 2 X 10GSFP+ 4 X 10GSFP+ 1 X 40G4
2 X
40G8 X
2 X
1 X
2 X
2 X
40G2 X
2 X
3 PCIe Interface Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x16 Gen3 x16 Gen3 x16 Gen3 x16
4 Dimensions
(H x L inches)
4.25 x 6.5   4.25 x 6.25 4.25 x 6.25 4.25 x 6.25 4.25 x 6.25 1.75 x12.28x14 4.25 x 10.5 4.25 x 10.5 4.25 x 6.5 4.25 x 10.5
5 Memory 32MB 4G 4G 4G 4G 16/32G 12G 12G 8G 12G
6 Timestamp 5.7 nS 5.7 nS 5.7 nS 5.7 nS 5.7 nS 5.7 nS 4 nS 4 nS 4 nS 4 nS
7 100% Packet
8 Gigamon, Arista
9 Packet Merging
10 Packet Parsing

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FPGA Acceleration Features

100% Packet Capture | Flow Classification | Flow Shunting | Precise Time Stamping | Packet Merging | Packet Slicing | Packet Parsing | Packet Filtering | Deduplication | Host Packet Buffer | Packet Steering | Direct Memory Access (DMA) | Statistics (RMON1)

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