Customer Specific Verilog Code

In last week’s post I showed the ANIC adapter pipeline and an astute observer may have noticed a block labeled “Customer Specific Verilog Code”. For those not familiar, Verilog is a language used to program FPGAs. It isn’t a high-level programming language like C or Java but rather a hardware description language (HDL) used to model electronic systems. Accolade has many engineers (or “designers” as they prefer to be called) that are very experienced with Verilog because our greatest value add is the ability to provide sophisticated CPU offload functionality with FPGAs.

Typically, our end-customers are not well versed in Verilog and the last thing they want to do is actually develop a Verilog-based design. However, on that rare occasion when a customer does have Verilog experience and actually wants or needs to do their own design, Accolade has put a process in place whereby customer specific Verilog code can be inserted directly into the adapter pipeline. One example, when this may be necessary is if the customer has a very secretive security algorithm or other proprietary techniques that they don’t want to expose to Accolade engineers.

Host CPU Offload Product Features Summary
wdt_ID Speed 1G 10G 10G 10G 10G/40G 10G/40G 100G 100G 100G 100G
1 Model ANIC-4Ku ANIC-20Ku ANIC-40Ku ANIC-40Kq ANIC-80Ku ATLAS-1000
Platform
ANIC-100Kq ANIC-200Ku ANIC-200K
Flex
ANIC-200Kq
2 Port/Type 4 X 1G SFP 2 X 10GSFP+ 4 X 10GSFP+ 1 X 40G4
X 10GQSFP+
2 X
40G8 X
10GQSFP+
SFP+
2 X
40GQSFP4
X10GSFP+
1 X
100GQSFP28
2 X
100GCFP4
2 X
40G2 X
100GQSFP28
2 X
100GQSFP28
3 PCIe Interface Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x16 Gen3 x16 Gen3 x16 Gen3 x16
4 Dimensions
(H x L inches)
4.25 x 6.5   4.25 x 6.25 4.25 x 6.25 4.25 x 6.25 4.25 x 6.25 1.75 x12.28x14 4.25 x 10.5 4.25 x 10.5 4.25 x 6.5 4.25 x 10.5
5 Memory 32MB 4G 4G 4G 4G 16/32G 12G 12G 8G 12G
6 Timestamp 5.7 nS 5.7 nS 5.7 nS 5.7 nS 5.7 nS 5.7 nS 4 nS 4 nS 4 nS 4 nS
7 100% Packet
Capture
8 Gigamon, Arista
Timestamp
9 Packet Merging
10 Packet Parsing

About Accolade

Accolade is the technology leader in FPGA-based Host CPU Offload and 100% Packet Capture PCIe NIC’s and Scalable 1U Platforms. Accolade’s line of 1-100GE products enable 100% packet capture, flow classification, flow shunting, deduplication, packet filtering and more. Our customers are global leaders in network monitoring & cybersecurity applications as well as in the network test and measurement, telecom and video stream monitoring markets.

FPGA Acceleration Features

100% Packet Capture | Flow Classification | Flow Shunting | Precise Time Stamping | Packet Merging | Packet Slicing | Packet Parsing | Packet Filtering | Deduplication | Host Packet Buffer | Packet Steering | Direct Memory Access (DMA) | Statistics (RMON1)

Free Product Evaluation

Resolve all your host CPU offload bottlenecks. Share Your Technical Requirements with our FPGA and software experts to tailor the optimal solution. Accolade offers a 60 day free product evaluation for qualified customers to fully test and evaluate our products.