Host Packet Buffer (HPB)

In order to support multi-core CPUs and multithreaded host applications, ANIC SmartNICs utilize a flexible HPB technique. Host memory is segmented into a number of fixed size blocks. The block size is configurable but is typically 2MB or 4MB each. A collection of these host memory blocks is then dynamically pooled together to form a HPB.

A specific application thread (often tied to a CPU core) is then explicitly assigned to a given HPB and will only process data that is “DMAed” into that HPB. Up to 64 independent HPBs can be created (per ANIC adapter) and in turn assigned to up to 64 host application threads.

Note that memory blocks assigned to an HPB do not have to be contiguous. In other words, each HPB is composed of blocks of host memory that are randomly spread out in various areas of physical host memory. In addition, memory blocks are temporarily assigned to a given HPB by the SmartNIC and once an application thread has finished processing all the data from a given memory block, that block can be assigned to a different HPB.

To test drive an Accolade ANIC SmartNIC please contact us at[email protected].

Host CPU Offload Product Features Summary

wdt_ID Speed 1G 10G 10G 10G 10G/40G 10G/40G 100G 100G 100G
1 Model 4Ku 20ku 40ku 40kq 80ku ATLAS-1100 Service Node ANIC-200KFlex ANIC-100Kq ANIC-200Kq
2 Port/Type 4X1G SFP 2X10G SFP+ 4X10G SFP+ 1X40G QSFP+ 4X10G SFP+ 2X40G QSFP+ 8X10G SFP+ 4x10G SFP+ 1x40G QSFP+ 2x100G QSFP28 2x40G QSFP28 1X100G QSFP28 2X100G QSFP28
3 PCIe Interface Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x16 Gen3 x16 Gen3 x16
4 Dimensions(H x L inches) 4.25 x 6.5   4.25 x 6.25 4.25 x 6.25 4.25 x 6.25 4.25 x 6.25 1.75 x12.28x14 4.25 x 6.5 4.25 x 10.5 4.25 x 10.5
5 Memory 32MB 4G 4G 4G 4G 16/32G 8G 12G 12G
6 Timestamp 5.7 nS 5.7 nS 5.7 nS 5.7 nS 5.7 nS 5.7 nS 4 nS 4 nS 4 nS
7 100% Packet
Capture		 ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓
8 Gigamon, AristaTimestamp ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓
9 Packet Merging ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓
10 Packet Parsing ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓

About Accolade

Accolade is the technology leader in FPGA-based Host CPU Offload and 100% Packet Capture PCIe NIC’s and Scalable 1U Platforms. Accolade’s line of 1-100GE products enable 100% packet capture, flow classification, flow shunting, deduplication, packet filtering and more. Our customers are global leaders in network monitoring & cybersecurity applications as well as in the network test and measurement, telecom and video stream monitoring markets.

FPGA Acceleration Features

100% Packet Capture | Flow Classification | Flow Shunting | Precise Time Stamping | Packet Merging | Packet Slicing | Packet Parsing | Packet Filtering | Deduplication | Host Packet Buffer | Packet Steering | Direct Memory Access (DMA) | Statistics (RMON1)

Free Product Evaluation

Resolve all your host CPU offload bottlenecks. Share Your Technical Requirements with our FPGA and software experts to tailor the optimal solution. Accolade offers a 60 day free product evaluation for qualified customers to fully test and evaluate our products.