FPGA Acceleration: The Key to Solving Packet Loss and Performance Degradation in Cyber Security and Network Monitoring Applications
FPGA-based Host CPU Offload at 10, 40 and 100G
At lower speeds host CPUs can keep up with robust cyber security and monitoring applications for IDS, IPS and Forensics. However at 10, 40 and 100G involving complex CPU intensive software functions, packet loss and performance degradation is often inevitable.
The first instinct for most application developers to solve this problem is with more software and a standard x86 CPU solution. This approach is simply not enough as some hardware acceleration or host cpu offload must be thrown into the mix.
Three viable options include 1) ASIC, 2) Network Processor (NPU) or 3) FPGA solutions. Read Don’t Monitor Your Network Without FPGA Acceleration to compare the pros/cons of each.
FPGA-based Host CPU Offload Solutions Guarantee Zero Packet Loss and Boost Application Performance
Read case studies illustrating how customers have implemented Accolade’s 1-100GE NICs/Platforms to solve host offload issues and enable advanced FPGA acceleration features such as flow classification, deduplication, packet filtering and more.
[Case Study] Startup Deploys Network Performance Sensor Using 1U, FPGA-based Acceleration Platform: ATLAS-1000
Proprietary Hash Algorithm Calculation in the FPGA Resulted in 70% Savings in CPU Cycles
Key Challenges Solved:
- Highly CPU intensive hash algorithm
- Ultra precise timing
- Platform requiring small footprint
- Lossless packet capture across all ports
- 10G and 40G network interfaces with optical tap
[Case Study] ntop and Accolade Deliver Innovative Flow Exporter Solution
Guaranteed 100% Lossless Packet Capture Across All Ports at 10G & 40G Speeds
Key Challenges Solved:
- Guarantee 100% lossless packet capture across all ports at 10G and 40G speeds
- Require hardware-based packet processing features to boost nProbe performance
- Require cost effective, fully integrated hardware platform with full service support
