Precise Time Stamping

Advanced FPGA-based Host CPU Offload

Each packet that enters an ANIC adapter is tagged with a timestamp with up to 4nS (nanosecond) time precision.

The ANIC adapter has to be disciplined from a timing source and there are five options as follows listed in order of popularity:

  1. Host OS – The host operating system acts as the time source and can in turn be disciplined by any other source such as PTP, 1PPS, NTP or the like.
  2. GPS/CDMA – ANIC adapter can be directly attached (via a front port) to a 1PPS (One Pulse Per Second) time source such as GPS or CDMA.
  3. PTP or IEEE 1588 – A PTP (Precision Time Protocol) network can be directly attached to an ANIC adapter via a front port.
  4. Another ANIC adapter – One ANIC adapter can be the time source for another by attaching them via the onboard “card-to-card bus”.
  5. Free Running – All timing is handled by the ANIC adapter onboard clock. This is the least precise mechanism but easiest to utilize.

noteAn ANIC adapter can also parse out a Gigamon or Arista generated timestamp and propagate it forward to the host application.

Host CPU Offload Product Features Summary
wdt_ID Speed 1G 10G 10G 10G 10G/40G 10G/40G 100G 100G 100G 100G
1 Model ANIC-4Ku ANIC-20Ku ANIC-40Ku ANIC-40Kq ANIC-80Ku ATLAS-1000 Platform ANIC-100Ku ANIC-200Ku ANIC- 200K Flex ANIC-200Kq
2 Port/Type 4 X 1G SFP 2 X 10GSFP+ 4 X 10GSFP+ 1 X 40G4 X 10GQSFP+ 2 X 40G8 X 10GQSFP+SFP+ 2 X 40GQSFP4 X 10GSFP+ 1 X 100GCFP4 2 x 100GCFP4 2 x 40G2 x 100GQSFP28 2 x 100GQSFP28
3 PCIe Interface Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x8 Gen3 x16 Gen3 x16 Gen3 x16 Gen3 x16
4 Dimensions(H x L inches) 4.25 x 6.5   4.25 x 6.25 4.25 x 6.25 4.25 x 6.25 4.25 x 6.25 1.75 x12.28 x 14 4.25 x 10.5 4.25 x 10.5 4.25 x 6.5 4.25 x 10.5
5 Memory 32MB 4G 4G 4G 4G 16/32G 12G 12G 8G 12G
6 Timestamp 5.7 nS 5.7 nS 5.7 nS 5.7 nS 5.7 nS 5.7 nS 4 nS 4 nS 4 nS 4 nS
7 100% Packet
Capture
8 Gigamon,
Arista
Timestamp
9 Packet Merging
10 Packet Parsing