Advanced FPGA-based Host CPU Offload
Each packet that enters an ANIC adapter is tagged with a timestamp with up to 4nS (nanosecond) time precision.
Data coming into the ANIC on different physical ports (e.g. 4 separate 10G ports) can be optionally merged together into a single (in timestamp order) combined stream of data packets. This is often required when an application needs to analyze both the receive and transmit directions of the same connection, but the data from the respective directions comes in on different ANIC ports. Once data is merged together, the host application can still determine which physical port a given packet came in on based upon a packet descriptor (metadata) that is provided for each received packet.
Packets can also be merged into a single stream from ports on different ANIC adapters. This merge is accomplished either via an external cable or the “card-to-card” bus available on each adapter.