With the introduction of Accolade FPGA IP onto Alveo Accelerator cards, we have had a few customers ask if they could integrate their own FPGA code into our packet processing pipeline. The answer to that is a resounding yes, and in fact Accolade has devised a mechanism to accommodate this which we call the “ANIC Shell”. This is a part of the pipeline where custom FPGA IP can be inserted. That custom IP could come from Accolade or from the end-customer.
Typically, our end-customers are not well versed in Verilog and the last thing they want to do is actually develop a Verilog based design. However, on that rare occasion when a customer does have Verilog experience and actually wants or needs to do their own design, the ANIC Shell can be a life saver. One example when this may be necessary is if the customer has a very secretive security algorithm or other proprietary techniques that they don’t want to expose to Accolade engineers.
To better understand how you can leverage the ANIC Shell or to just better understand how Accolade can help you, please contact us at firstname.lastname@example.org.